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Figure 3-4 shows the two-input, single-output, difference amplifier with two input signals that are equal in amplitude and in phase. Figure 3-4. - Input signals in phase.
Notice, that the output signal remains at 0 volts for the entire time (T0 - T8). Since the two input signals are equal in amplitude and in phase, the difference between them (the base-to-emitter bias) is always 0 volts. This causes a 0-volt output signal. If you compute the bias at any time period (T0 - T8), you will see that the output of the circuit remains at a constant zero. For example:
From the above example, you can see that when the input signals are equal in amplitude and in phase, there is no output from the difference amplifier because there is no difference between the two inputs. You also know that when the input signals are equal in amplitude but 180 degrees out of phase, the output looks just like the input except for amplitude and a 180-degree phase reversal with respect to input signal number one. What happens if the input signals are equal in amplitude but different in phase by something other than 180 degrees? This would mean that sometimes one signal would be going negative while the other would be going positive; sometimes both signals would be going positive; and sometimes both signals would be going negative. Would the output signal still look like the input signals? The answer is "no," because figure 3-5 shows a difference amplifier with two input signals that are equal in amplitude but 90 degrees out of phase. From the figure you can see that at time zero (T0) input number one is at 0 volts and input number two is at -1 volt. The base-to-emitter bias is found to be +1 volt. Figure 3-5. - Input signals 90 out of phase.
This +1-volt bias signal causes the output signal to be -10 volts at time zero (T0). Between time zero (T0) and time one (T1), both input signals go positive. The difference between the input signals stays constant. The effect of this is to keep the bias at +1 volt for the entire time between T0 and T1. This, in turn, keeps the output signal at -10 volts. Between time one (T1) and time two (T2), input signal number one goes in a negative direction but input signal number two continues to go positive. Now the difference between the input signals decreases rapidly from +1 volt. Halfway between T1 and T2 (the dotted vertical line), input signal number one and input signal number two are equal in amplitude. The difference between the input signals is 0 volts and this causes the output signal to be 0 volts. From this point to T2 the difference between the input signals is a negative value. At T2:
From time two (T2) to time three (T3), input signal number one goes negative and input signal number two goes to zero. The difference between them stays constant at -1 volt. Therefore, the output signal stays at a +10-volt level for the entire time period from T2 to T3. At T3 the bias condition will be:
Between T3 and T4 input signal number one goes to zero while input signal number two goes negative. This, again, causes a rapid change in the difference between the input signals. Halfway between T3 and T4 (the dotted vertical line) the two input signals are equal in amplitude; therefore, the difference between the input signals is 0 volts, and the output signal becomes 0 volts. From that point to T4, the difference between the input signals becomes a positive voltage. At T4:
(The sequence of events from T4 to T8 are the same as those of T0 to T4.) As you have seen, this amplifier amplifies the difference between two input signals. But this is NOT a differential amplifier. A differential amplifier has two inputs and two outputs. The circuit you have just been shown has only one output. Well then, how does a differential amplifier schematic look? TYPICAL DIFFERENTIAL AMPLIFIER CIRCUIT Figure 3-6 is the schematic diagram of a typical differential amplifier. Notice that there are two inputs and two outputs. This circuit requires two transistors to provide the two inputs and two outputs. If you look at one input and the transistor with which it is associated, you will see that each transistor is a common-emitter amplifier for that input (input one and Q1; input two and Q2). R1 develops the signal at input one for Q1, and R5 develops the signal at input two for Q2. R3 is the emitter resistor for both Q1 and Q2. Notice that R3 is NOT bypassed. This means that when a signal at input one affects the current through Q1, that signal is developed by R3. (The current through Q1 must flow through R3; as this current changes, the voltage developed across R3 changes.) When a signal is developed by R3, it is applied to the emitter of Q2. In the same way, signals at input two affect the current of Q2, are developed by R3, and are felt on the emitter of Q1. R2 develops the signal for output one, and R4 develops the signal for output two. Figure 3-6. - Differential amplifier.
Even though this circuit is designed to have two inputs and two outputs, it is not necessary to use both inputs and both outputs. (Remember, a differential amplifier was defined as having two possible inputs and two possible outputs.) A differential amplifier can be connected as a single-input, single-output device; a single-input, differential-output device; or a differential-input, differential-output device. Q.1 How many inputs and outputs are possible with a differential amplifier? |
 
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