SPECIAL LOGIC CIRCUITS

LEARNING OBJECTIVES

Upon completion of this chapter, you should be able to do the following:

INTRODUCTION

Figure 3-1 is a portion of a typical logic diagram. It is similar to the diagrams you will encounter as your study of digital circuitry progresses.

Figure 3-1. - Typical logic diagram.

Look closely at the figure. You will see many familiar logic gates. You will also see several that you may not recognize.

Digital equipment must be capable of many more operations than those described in chapter 2. Provisions must be made for accepting information; performing arithmetic or logic operations; and transferring, storing, and outputting information. Timing circuits are included to ensure that all operations occur at the proper time.

In this chapter you will become acquainted with the logic circuits used to perform the operations mentioned above.

THE EXCLUSIVE OR GATE

The exclusive OR gate is a modified OR gate that produces a HIGH output when only one of the inputs is HIGH. You will often see the abbreviation X-OR used to identify this gate. When both inputs are HIGH or when both inputs are LOW, the output is LOW.

The standard symbol for an exclusive OR gate is shown in figure 3-2 along with the associated Truth Table. The operation function sign for the exclusive OR gate is .

Figure 3-2. - Exclusive OR gate and Truth Table.

If you were to observe the input and output signals of an X-OR gate, the results would be similar to those shown in figure 3-3. At T₀, both inputs are LOW and the output is LOW. At T₁, A goes to HIGH and remains HIGH until T₂. During this time the output is HIGH. At T₃, B goes HIGH and remains HIGH through T₅. At T₄, A again goes HIGH and remains HIGH through T₅. Between T₃and T₄ , the output is HIGH. At T₄, when both A and B are HIGH, the output goes LOW.

Figure 3-3. - Exclusive OR gate timing diagram.

THE EXCLUSIVE NOR GATE

The exclusive NOR (X-NOR) gate is nothing more than an X-OR gate with an inverted output. It produces a HIGH output when the inputs are either all HIGH or all LOW. The standard symbol and the Truth Table are shown in figure 3-4. The operation function sign is with a vinculum over the entire expression.

Figure 3-4. - Exclusive NOR gate and Truth Table.

A timing diagram for the X-NOR gate is shown in figure 3-5. You can see that from T₀ to T₁, when both inputs are LOW, the output is HIGH. The output goes LOW when the inputs are opposite; one HIGH and the other LOW. At time T₃, both inputs go HIGH causing the output to go HIGH.

Figure 3-5. - Exclusive NOR gate timing diagram.

Q.1 What is the sign of operation for the X-OR gate?
Q.2 What will be the output of an X-OR gate when both inputs are HIGH?
Q.3 A two-input X-OR gate will produce a HIGH output when the inputs are at what logic levels?
Q.4 What type of gate is represented by the output Boolean expression T R?
Q.5 What will be the output of an X-NOR gate when both inputs are LOW?