full adders, as shown in figure 3-11, enables the circuit to perform R's complement subtraction as well as addition. ">

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Q.12 What is the output of C1?answer.gif (214 bytes)

SUBTRACTION

Subtraction is accomplished in computers by the R's complement and add method. This is the same method you used in chapter 1 to subtract binary numbers.

R's complement subtraction allows us to use fewer circuits than would be required for separate add and subtract functions. Adding X-OR gates to full adders, as shown in figure 3-11, enables the circuit to perform R's complement subtraction as well as addition.

Figure 3-11. - R's complement adder/subtracter.

To add two numbers using this circuit, the addend and augend are applied to the A and B inputs. The B inputs are applied to one input of the X-OR gates. A control signal is applied to the other input of the X-OR gates. When the control signal is LOW, the circuit will add; and when it is HIGH, the circuit will subtract.

In the add mode, the outputs of the X-OR gates will be the same as the B inputs. Addition takes place in the same manner as described in parallel addition.

Before we attempt to show subtraction, let's review R's complement subtraction. To subtract 102 from 112, write down the minuend (112). Perform the R's complement on the subtrahend. Now add the minuend and the complemented subtrahend.

NF130221.GIF (2979 bytes)

Disregard the most significant 1, and the difference between 112 and 102 is 012. The most significant 1 will not be used in the example shown in the following paragraph.

Now let's subtract 102 from 112 using the adder/subtracter circuit. The minuend (112) is input on the A terminals, and the subtrahend (102) is input on the B terminals. In the subtract mode, a 1 from the control circuit is input to each of the X-OR gates and to the C0 carry input. By applying a 1 to each of the X-OR gates, you find the output will be the complement of the subtrahend input at B1 and B2. Since B1 is a 0, the output of X-OR 1 will be 1. The input B2 to X-OR 2 will be inverted to a 0. The HIGH input to C0 acts as a carry from a previous circuit. The combination of the X-OR gates and the HIGH at C0 produces the R's complement of the subtrahend. The full adders add the minuend and the R's complement of the subtrahend and produce the difference. The output of C2 is not used. The outputs of S2 and S1 are 0 and 1, respectively, indicating a difference of 012. Therefore, 112 minus 102 equals 012.

Q.13 What type of logic gates are added to a parallel adder to enable it to subtract? answer.gif (214 bytes)
Q.14 How many of these gates would be needed to add a four-digit number? answer.gif (214 bytes)
Q.15 In the add mode, what does the output of C2 indicate? answer.gif (214 bytes)
Q.16 In the subtract mode, a 1 at C 0 performs what portion of the R's complement? answer.gif (214 bytes)
Q.17 In the subtract mode, which portion of the problem is complemented? answer.gif (214 bytes)







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